aveni Blog When ECD Hits the Wall at 10nm, What Will Our Options Be for Copper Fill?

Despite the fact that the International Technology Roadmap for Semiconductors (ITRS) has just published its final missive and has shifted efforts to the heterogeneous integration roadmap, developments for smaller technology nodes continue at leading integrated device manufacturers and foundries. According to a SEMI Engineering blog post published in January, we can expect to see 10nm [...]The post When ECD Hits the Wall at 10nm, What Will Our Options Be for Copper Fill? appeared first on aveni.